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Hi,
first of all you have a typo in the name of your entity ( photosensei ?). Next point is that
you could not use non-constant real values for synthesis. No synthesis tool is able to convert such value into logic. Real number could be used in simualtion only. I'm not a VHDL expert, but I think you have also a problem with the variable definitons of "seconds1, seconds2, secondst", because they are defined outside of the processes which are using it.
Kind regards
GPK
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Hello everyone, I think there's one more strange construction in the code:
I can't imaging the RTL construction corresponding thise code.
First of all it would be better if you use sensitive list instead of wait and if ... then ...else construction to write your code. Because strings
don't seems to me synthesisable.
P.S. Sorry for my english. It's not very good.
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Hi, thank you all for the reply.
GPK, I noticed that too when I tried to compile. It doesn't allow me to synthesize non-constant variables. The typo (photosensei) is due to my friend naming the code weirdly... I decided it change it when I post it here :D
I managed to solve the problem. I re-did the code and then my teammate said that I should use ieee.std_logic_arirth and ieee.std_logic_unsigned instead of std_numeric, because it was causing me problems for some reason. Instead of using variables I used integers and std_logic_vector only, because variables tend to be problematic (I think I read that somewhere in the forums).
Again, thanks for the suggestions. I appreciate it.
Honored Contributor
