Error 10327: Can't determine definition of operator "+"

Besides other possible problems: Real is a VHDL type not supported for logic synthesis, e.g. as a variable or signal. It can be only used for compile time calculations.

The part of your code, that is actually performing floating point arithmetic (the 2.0**i doesn't) can be coded with IEEE float and respective multiply and divide MegaFunctions. But it's most likely better to design a suitable fixed point respresentation for the signals.