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CSoti
New Contributor
New ContributorError (10232): Verilog HDL error : index 22 cannot fall outside the declared range [21:0] for vector "address"
I am using Quartus Prime Lite Edition 18.1 to generate a system that includes a Platform designer system with Avalon MM Master-Slave interface. Every time I use more than 2 slaves I get the following...
Vicky1
Regular Contributor
Regular ContributorHi,
Please check the below solution & let me know, how it works for you,
As mentioned in previous post, if possible provide project file.
Regards,
Vikas
