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CSoti's avatar
CSoti
Icon for New Contributor rankNew Contributor
7 years ago

Error (10232): Verilog HDL error : index 22 cannot fall outside the declared range [21:0] for vector "address"

I am using Quartus Prime Lite Edition 18.1 to generate a system that includes a Platform designer system with Avalon MM Master-Slave interface. Every time I use more than 2 slaves I get the following...
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
7 years ago

Without seeing the system or code (for a custom component?), it's really hard to tell what's going on here. Can you provide?

#iwork4intel