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Altera_Forum
Honored Contributor
Honored ContributorError (10028): Can't resolve multiple constant drivers for net <name> at <??>
All, Here is one of my Verilog trial-learning code: ============================================================== // Verilog learning example
module SRAM_Read_Write_Sync ( nrst, Writeclk, ...
Altera_ForumHonored Contributor
Honored ContributorComparing both addresses asynchronously is potentially worse than in a clock domain as it will be very glitchy, especially as you're using a count and not a grey code.
