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Altera_Forum's avatar
Altera_Forum
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12 years ago

Error : object used but not declared

Hi, I just want to create a signal_copie_req out std_logic : entity test_connexions is port( signals ... signal_copie_req : out_std_logic; )... COMPONENT test_connexio...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

yep that was it "out_std_logic", sorry to give a piece of code and not the whole code like I wrote in my VHDL project.

Regards,

Julien_92.