New Contributor
Super ContributorThe option no longer exists in newer versions of Quartus. Removing the pessimism would not be the solution for timing issues even if the option was still available. There must be another reason(s) why you are seeing hold timing violations. Make sure you're analyzing hold timing using a fast corner timing model, and make sure you have the Optimize Hold Timing advanced Fitter setting enabled (it's on by default, but check to make sure).
New ContributorThank you @sstrell ,
1. The Optimize Hold Timing advanced Fitter setting is enabled.
2. Clock paths for Data Arrival Path and for Data Required Path have a common PLL. On-Die Variation makes use of a slow and fast sub-models for it. However, since the PLL is common for both paths, Common Clock Path Pessimism should remove these on-die variations. Checking my another design in a similar situation, I can see "clock pessimism removed" line in the Timing Report and no timing issues. But in this specific design I don't see this line which causes the hold time violation.
The design was initialized in an older Quartus version by someone who doesn't work here anymore, so probably he has disabled pessimism removal option. How can I fix it?
Thank you
