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Altera_Forum
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13 years ago

Embedding build number in VHDL?

I'd like some automatic way of putting a build or release or version number into my design so that I can check what version a given PCB is programmed with. Can anyone suggest how to do this? I...
Altera_Forum's avatar
Altera_Forum
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13 years ago

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Thanks guys, the timestamp script looks to be my best way forward. I'd rather go with my Subversion revision number, but a timestamp is a reasonable substitute.

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In CVS you can use a tag in the Tcl, e.g., I think something like the following

set revision_string "$$Revision : $$"

which gets re-written during CVS checkin as

set revision_string "$$Revision : 1.23 $$"

After CVS checkin of the script, you could then parse the string to extract a version number, and then convert that into your register values. You could probably do the same for SVN too.

However, the pain with this approach is that specific file never really changes, so the string never updates.

I personally use a design version register with a value I manually update, and a build time register.

Cheers,

Dave