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Altera_Forum
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8 years ago

Easiest Testbench for my VHDL code (multiplication)

Hello there. Is there somebody who can make testbench from my vhdl code? It is multiplication of 2 integers, which are n-1 downto 0.. n=16. Thanks a lot.. library IEEE;use IEEE.STD_LOGIC_1164.A...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

I think the error is fairly self explanitory.

wherever the error is, the widths do not match. The left side requires 4 bits, but you're only assigning 2