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Altera_Forum
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8 years ago

Easiest Testbench for my VHDL code (multiplication)

Hello there. Is there somebody who can make testbench from my vhdl code? It is multiplication of 2 integers, which are n-1 downto 0.. n=16. Thanks a lot.. library IEEE;use IEEE.STD_LOGIC_1164.A...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Hi

Have you tried option 1??

Learn to write test-bench google it.

http://eng.umb.edu/~cuckov/classes/engin341/lectures/l02%20-%20vhdl%20-%20dataflow%20and%20structural%20modeling%20and%20testbenches.pdf 


--ONE OF THE WAY OF WRITING TB IS SHOWN YOU CAN USE LOOPS TO TEST ALL THE CASE
  stimulus: process
  begin
    a<="0101";
    b<="0101";
    wait for 20ns;
    a<="1111";
    b<="1111";
    wait;
  end process;

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)