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Altera_Forum
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8 years ago

Easiest Testbench for my VHDL code (multiplication)

Hello there. Is there somebody who can make testbench from my vhdl code? It is multiplication of 2 integers, which are n-1 downto 0.. n=16. Thanks a lot.. library IEEE;use IEEE.STD_LOGIC_1164.A...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

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Thanks a lot for these files.. But i don't know what to write to UUT.. It is empty and i need to put values there.

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option 1: don't write any testbench. Just use mult module with inputs initialised to values of your choice and check output on waveform.

option 2: write testbench as counting sequences to drive the inputs.

option 3: don't do anything and trust the mult as we do. once your project is mature you can testbench your whole project