According to timing recommendations I am trying to manually duplicate logic using eitherset_instance_assignment -name duplicate_hierarchy_depth reg levelorset_instance_assignment -name duplicate_register reg levelaccording to AN-1016 section 4.2.4.2.But, Quartus Prime 25.1 Lite complains that duplicate_hierarchy_depth is an illegal assignment. duplicate_register seems to be ignored by Quartus and I cannot find either of them in the Assignment Editor.Any suggestions to what I am doing wrong?

I'm pretty sure duplicate_hierarchy_depth is only available in Pro, not Lite or Standard.As for duplicate_register, is your format of the assignment matching the AN (with -to <# of regs per fanout>)?

sstrell got it right—thank you for the clarification.The DUPLICATE_HIERARCHY_DEPTH assignment is supported only in Quartus Prime Pro, and AN‑1016 is written specifically for the Pro software flow. (Assignment Name in Pro: Duplicate One or More Registers in a Chain Based on Hierarchy)In Quartus Prime Standard/Lite, use the Manual Logic Duplication in the Assignment Editor to duplicate the register. A green check mark indicates that the assignment is valid.Regards,Richard Tan

Great, thanks for the quick response! Is there an application note similar to AN1016, for the Standard/Lite version of Quartus?

I can't find application note specific for Quartus Standard unfortunately, Though you can checkout the timing analyzer cookbook and the Quartus Prime Standard Edition User Guide Design Recommendations. Section 1.2.3.3. Optimizing for Timing ClosureThere are also Timing Analyzer youtube training posted by Altera.https://docs.altera.com/r/docs/683081/22.2/quartus-prime-timing-analyzer-cookbook/quartus-prime-timing-analyzer-cookbookhttps://docs.altera.com/r/docs/683323/18.1/intel-quartus-prime-standard-edition-user-guide-design-recommendations/optimizing-for-timing-closure Regards,Richard Tan

I still have issues with a register-to-register timing, and I get the same recommendations from the Timing Analyzer According to recommendations I try this assignment using the assignment editor But, this does not make any difference on the timing report. Is it possible to verify that the assignment is actually considered? Have I misunderstood how to set the assignment?

Duplicate_hierarchy_depth / duplicate_register

11 Replies

cjak
New Contributor
18 hours ago
Seems like I am able to add the correct assignments in the editor
Both are "green". I do not get any warnings during compilation, but the timing analyzer still recommends duplication of the node marked in blue, above.
Has the assignment really been considered?
cjak
New Contributor
1 day ago
After updating in the assignment editor, I get this message during compilation
The question is then, what does this really mean?
...and...
This is how it looks in the code
To my understanding, there is a path between interrupt_rx_mask_regs_s1.reg1 and o_gpio(7).
cjak
New Contributor
1 day ago
And the value = number of duplications?....not "name of duplicate node" as described in the text-field...
RichardT_altera
Super Contributor
1 day ago
Yes, it should looks something like this.
Filled in the respectively source node and the destination node.

I think there is a typo in the description, the value field is to specify the *number* of the duplicates needed to alleviate the fan-out load on a register.

Regards,
Richard Tan
cjak
New Contributor
1 day ago
This seems strange. Do you mean like this?
As you can see, the description of the value-field is quite different from what you suggest...
cjak
New Contributor
1 day ago
I still have issues with a register-to-register timing, and I get the same recommendations from the Timing Analyzer
According to recommendations I try this assignment using the assignment editor
But, this does not make any difference on the timing report. Is it possible to verify that the assignment is actually considered?
Have I misunderstood how to set the assignment?
- sstrell
  Super Contributor
  1 day ago
  In the value column, you have to enter the number of duplications (an integer) of the source register set in the To column. I'm surprised Quartus isn't giving you an error with that assignment the way you currently have it.
  Blank out the From column, set the To column to the register you want to duplicate, and then set a value in the Value column.
cjak
New Contributor
2 days ago
Great, thanks for the quick response!
Is there an application note similar to AN1016, for the Standard/Lite version of Quartus?
- RichardT_altera
  Super Contributor
  2 days ago
  I can't find application note specific for Quartus Standard unfortunately,
  Though you can checkout the timing analyzer cookbook and the Quartus Prime Standard Edition User Guide Design Recommendations. Section 1.2.3.3. Optimizing for Timing Closure
  
  There are also Timing Analyzer youtube training posted by Altera.
  
  https://docs.altera.com/r/docs/683081/22.2/quartus-prime-timing-analyzer-cookbook/quartus-prime-timing-analyzer-cookbook
  https://docs.altera.com/r/docs/683323/18.1/intel-quartus-prime-standard-edition-user-guide-design-recommendations/optimizing-for-timing-closure
  
  Regards,
  Richard Tan
sstrell
Super Contributor
2 days ago
I'm pretty sure duplicate_hierarchy_depth is only available in Pro, not Lite or Standard.
As for duplicate_register, is your format of the assignment matching the AN (with -to <# of regs per fanout>)?
- RichardT_altera
  Super Contributor
  2 days ago
  sstrell got it right—thank you for the clarification.
  
  The DUPLICATE_HIERARCHY_DEPTH assignment is supported only in Quartus Prime Pro, and AN‑1016 is written specifically for the Pro software flow. (Assignment Name in Pro: Duplicate One or More Registers in a Chain Based on Hierarchy)
  
  In Quartus Prime Standard/Lite, use the Manual Logic Duplication in the Assignment Editor to duplicate the register. A green check mark indicates that the assignment is valid.
  
  Regards,
  Richard Tan

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Duplicate_hierarchy_depth / duplicate_register

11 Replies

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