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In Q15.0 a constraint change is being made to these cases. set_false_path is being removed and set_net_delay is being used to constrain the datapath, while set_max_delay 100 and set_min_delay -100 are used to override the clock waveforms' derived setup/hold requirements. set_max_skew is also being added for multi-bit bus transfers that need a skew requirement. set_net_delay and set_max_skew now have new options as well to derive their values based on the clock periods of the clocks involved in the transfer.
You can generate the net delay and skew constraints using the get_value_from_clock_period calls and the value_multiplier options to scale to a % of the clock period you select.
Usage: set_max_skew [-h | -help] [-long_help]
[-exclude <Tcl list>]
[-fall_from_clock <names>]
[-fall_to_clock <names>]
[-from <names>]
[-from_clock <names>]
[-get_skew_value_from_clock_period <src_clock_period|dst_clock_period|min_clock_period>]
[-include <Tcl list>]
[-rise_from_clock <names>]
[-rise_to_clock <names>]
[-skew_value_multiplier <multiplier>]
[-through <names>]
[-to <names>]
[-to_clock <names>]
[<skew>]
Usage: set_net_delay [-h | -help] [-long_help]
[-from <names>]
[-get_value_from_clock_period <src_clock_period|dst_clock_period|min_clock_period|max_clock_period> ]
[-max]
[-min]
[-to <names>]
[-value_multiplier <multiplier>]
[<delay>]
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Can you give a sample of the usage of set_net_delay?
I want to constrain the datapath between {u6|out~32_I|combout} with {u6|out~40_I|datac}, and the datapath is combinational logic. Can I use set_net_delay to achieve this?
Can the set_net_delay be used in Quartus II 9.1?
Honored Contributor
