Forum Discussion
Altera_Forum
Honored Contributor
13 years ago --- Quote Start --- What is mean of "continuous assignments"? Do you mean "unblocking assignment" in Verilog? --- Quote End --- I thought you are familiar with Verilog terminology. Continuous assignments is the Verilog term for assignments outside procedures (always, function, task etc).
assign f=(x1 && x2) || x3;They are neither blocking nor non-blocking. VHDL is using <= for the same kind of assignments (assignments outside a process).