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JDe_S4's avatar
JDe_S4
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8 years ago

Does Quartus 18.0 support the VHDL 2008 'ELEMENT attribute?

I am using the VHDL 'ELEMENT attribute to determine the range of an element in an array. ReadRegisterData: process (REG_CLK) is begin if (rising_edge(REG_CLK)) then i_RegReadD...
JDe_S4's avatar
JDe_S4
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8 years ago

Hi @Tricky​ ,

Thanks for the information and the suggested workaround. I should have thought of it myself (embarrassed). I implemented the workaround and everything compiles without errors. Like the VHDL-2008 way though.

@MUsman​

Thanks for pointing out where and how to find the Quartus Prime Standard handbooks. I downloaded the pdf's right away. If I read paragraph 16.2.2.1 VHDL-2008 Support of Volume 1 Design and Synthesis correctly The Intel Quartus Prime software contains support for VHDL 2008 (as @Tricky​ pointed out). So the question stays: should I trust the handbook or the table on page 7 of the document @Vicky​ referred to?

Thanks