Forum Discussion
JDe_S4
New Contributor
New ContributorDoes Quartus 18.0 support the VHDL 2008 'ELEMENT attribute?
I am using the VHDL 'ELEMENT attribute to determine the range of an element in an array. ReadRegisterData: process (REG_CLK) is
begin
if (rising_edge(REG_CLK)) then
i_RegReadD...
MuhammadAr_U_Intel
Contributor
Contributor@Tricky I am sorry for the inconvenience, you can navigate to Quartus Prime Standard Documentation at the link below. Type "quartus prime standard" in search box you should be able to get Quartus Prime Handbooks.
hope this helps.
