Forum Discussion
JDe_S4
New Contributor
New ContributorDoes Quartus 18.0 support the VHDL 2008 'ELEMENT attribute?
I am using the VHDL 'ELEMENT attribute to determine the range of an element in an array. ReadRegisterData: process (REG_CLK) is
begin
if (rising_edge(REG_CLK)) then
i_RegReadD...
Vicky1
Regular Contributor
Regular ContributorHi,
Quartus Prime Version 18.0.0 Standard Edition doesn't support this VHDL 2008 feature.
please refer the Table available at page no.7 from below link,
Let me know if this has helped resolve the issue you are facing or if you need any further assistance.
Best Regards
Vikas Jathar
(This message was posted on behalf of Intel Corporation)
