Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
9 years ago

Divided integer number

Can I divide the integer number (for example, 120) to each of the numbers 1 2 0 in different variables?

14 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    use your favorite web search engine an enter double dabble as keywords, you'll find plenty of resources there.

    --- Quote End ---

    Problem solved. This is my code. 133 logic elements

    library ieee;

    use ieee.std_logic_1164.all;

    use ieee.numeric_std.all;

    entity converter is

    port( INPUT12bit: in unsigned (11 downto 0):="000000101010";

    digit1_out: buffer integer range 0 to 10;

    digit2_out: buffer integer range 0 to 10;

    digit3_out: buffer integer range 0 to 10;

    digit4_out: buffer integer range 0 to 10;

    clk :in std_logic);

    end entity;

    architecture main of converter is

    begin

    process(clk)

    variable digit1: integer range 0 to 10;

    variable digit2: integer range 0 to 10;

    variable digit3: integer range 0 to 10;

    variable digit4: integer range 0 to 10;

    VARIABLE decount_INPUT12bit :unsigned (11 downto 0);

    variable default_INPUT12bit :unsigned (11 downto 0);

    variable LAST_INPUT12bit :unsigned (11 downto 0);

    variable LAST1_INPUT12bit :unsigned (11 downto 0);

    variable ENABLE: std_logic:='0';

    begin

    if rising_edge(clk) then

    if ENABLE='1' then

    decount_INPUT12bit := decount_INPUT12bit - 1;

    digit1:=digit1 + 1;

    if digit1=10 then

    digit1:=0;

    digit2:=digit2 + 1;

    if digit2=10 then

    digit2:=0;

    digit3:=digit3 + 1;

    if digit3=10 then

    digit3:=0;

    digit4:=digit4 + 1;

    end if;

    end if;

    end if;

    end if;

    if LAST_INPUT12bit/=INPUT12bit then

    ENABLE:='1';

    if INPUT12bit/=LAST1_INPUT12bit then

    decount_INPUT12bit:=INPUT12bit;

    default_INPUT12bit:=INPUT12bit;

    LAST1_INPUT12bit:=INPUT12bit;

    digit1:=0;

    digit2:=0;

    digit3:=0;

    digit4:=0;

    end if;

    end if;

    if decount_INPUT12bit = "000000000000" then

    LAST_INPUT12bit:=default_INPUT12bit;

    ENABLE:='0';

    digit1_out<=digit1;

    digit2_out<=digit2;

    digit3_out<=digit3;

    digit4_out<=digit4;

    end if;

    end if;

    end process;

    end main;
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    This might have a small logic footprint, but I can see the performance being rather poor, due to the large cascaded logic chains because of no pipelining.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    This might have a small logic footprint, but I can see the performance being rather poor, due to the large cascaded logic chains because of no pipelining.

    --- Quote End ---

    Yes I need little logic elements. Slow transfer no harm. This module will be multiplexed for 8 digits - 4digit and 4 digit
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Could you use code tags when posting code in the future?

    This makes it way esier to read.