Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Display of amount of Block RAM used for a SC_FIFO missing

Hallo, I used Quartus 16.1.203 to compile a design where I used a FIFO IP which is, I assume is synthesised/built as a RAM. The compilation is successful. But in the summary I do not see...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Then I assume Quartus has decided your FIFO is unnecessary to implement your design and has stripped it out. Have you connected it up correctly?

Cheers,

Alex