Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Display of amount of Block RAM used for a SC_FIFO missing

Hallo, I used Quartus 16.1.203 to compile a design where I used a FIFO IP which is, I assume is synthesised/built as a RAM. The compilation is successful. But in the summary I do not see...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

--- Quote Start ---

I assume is synthesised/built as a RAM

--- Quote End ---

I assume your assumption is questionable...

When you configure your IP you can, depending on device family and IP, chose whether to use RAM (including type if appropriate) or logic or let Quartus decide. What other resource utilisation do you see? Has Quartus simply constructed it from logic?

Cheers,

Alex