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lambert_yu's avatar
lambert_yu
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5 years ago

different behavior for the same project after synthesis&compile

Hi all, I face one strange problem: For the same project, use the same quartus software, but after synthesis & compile, I got some .jic file, but for some .jic, the behavior is abnormal...
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
5 years ago

Without seeing any results or a project or any design files or the exact steps you've followed, there's not much that can be done here. Supply some more information on exactly what is going on and maybe some files or code or something.

  • lambert_yu's avatar
    lambert_yu
    Icon for Contributor rankContributor
    5 years ago

    Hi，

    About company's confidentially principle, I could not provide any RTL code. About Compile flow : follow analysis&synthesis -> fitter->assembler->timequest; I make sure that the RTL is same and most of .jic file can run normally on debug board, some .jic file is not okay.