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Altera_Forum
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8 years ago

Design Compilation Report: Performance Results

I am using Intel FPGA SDK for OpenCL to compile my OpenCL design as follows: aoc -v --board a10gx my_kernel.cl -o my_kernel.aocx --report In the report I found board utilization estima...
Altera_Forum's avatar
Altera_Forum
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8 years ago

Board utilization --> Check acl_quartus_report.txt after full placement-and-routing.

Overall latency --> If you mean the cumulative latency of all the pipelines, you can just calculate the sum of the latency values from the report. If you want something else, clarify.

Interval --> I am not sure what you mean by this.

Power --> Precise power usage can only be obtained by running the kernel on an actual board and either reading the power sensor from the board (if available) or using a PCI-E extender alongside with external power meters. Power estimations can be obtained by using Quartus PowerPlay on the project that is created by the OpenCL compiler.