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Altera_Forum's avatar
Altera_Forum
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8 years ago

Delaying all incoming signals by 2 ms using VHDL

Hi to all, I'm a finance student and I'm also interested in electronics, these days I do program because my limited of knowledge of this, so ask for help in here.I have two incoming signals that I wa...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

you could use a pll or an external clock to create a faster clock, which gives greater resolution.