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Altera_Forum
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7 years ago

DE5aNet-DDR4 opencl17.1 setup question

I"m trying to set up my DR5aNet DDR4 FPGA board. I installed OpenCL and Quartus Prime properly, following the manual. But the problem is I cannot compile a test project of fft1d.cl into fft1d.aocx. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
7 years ago

Thank you, HRZ.

My FPGA is 10AX115N2F45E1SG so do you have any idea to solve this?

I could compile it on v16.1 but I still want to work on v17.1.

any ideas would be appreciated.