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Altera_Forum
Honored Contributor
10 years agoDE0-NANO and Qsys : error when quit Qsys tools
Hi, I begin to use Quartus 15.0 and Qsys. I want create a ADC project. I use Qsys tools. I put CPU : Nios II (Classic) Processor. When I quit Qsys tools, i have this error (I didn't generate): ...
Altera_Forum
Honored Contributor
10 years agoHi,
I haven't error NOW. it must not use Classic Processor but "Nios II Processor". I generate with synthesis "Verilog" BUT same error sip and qiq files I will test with 13.0 version and after open my project with 15.0 version Jennifer