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Altera_Forum
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15 years ago

DDR2 SDRAM interleving??

Hi everyone, I am using Cyclone III dev. board. I am trying to design a DDR2 SDRAM controller using SOPC builder. I need to increase the bandwidth and want to do memory interleaving, but have ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Hi,

Could you find a way to do bank interleaving? If yes, please share as I am also struggling with it. Actually I could do it for read transfers and got a seamless consecutive read transactions on different banks. But, write transfers are with bubble of 4-5 clocks when I change the bank.

Best regards.