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Altera_Forum's avatar
Altera_Forum
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14 years ago

DDR2 HPCII v11.0 problem, thanks for help !

everything seems well, however, local_init_done is always low, what's wrong?

I tried both the full calibration and "skip the calibration", it doesn't change anything, the local_init_done is always low !

PS. I believe the PCB board is good.

PS. I tried to use debug toolkit to check the internal states, however, when I downloaded

altera.com/technology/memory/dram/altmemphy/debug/debug-toolkit.zip

and un-packed it, there is a DEBUG GUI README.txt, which says: This is the Altera ALTMEMPHY Debug GUI. It is an application to view the internal state of the calibration sequencer that initialises the DDR3 ALTMEMPHY Megafunction.

But mine memory is DDR2 !

PS. ctl_cal_fail is high and ctl_cal_success is low, what's wrong with the calibration?

PS. the memory is sumsung K4T51163QI

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  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    I am not using Qsys. I am using MegaWizrad to generate ALTMEMPHY with example driver. I have connected the top level (example driver) clock_source and global_reset_n to the correct pin appropriately.

    -- Calibration fails with or without DIMM installed. Memory stick absence create no difference in behavior

    -- Clocks are differential and at 125Mhz

    -- There is some initial activity on DQ/DQS channels, but they die off (at every reset)

    -- local_init_done stays low

    -- Signal tap shows a single write with some random words, but "ready" never gets asserted (at every reset)

    -- Signal tap shows that Calibration_fail gets asserted at every reset

    -- ModelSim shows just a blip on DQ/DQS attempting to write all 0s and all 1s pattern, then they are tristate forever

    -- Modelsim runs forever (overnight), but test_complete never goes high, and I dont see any activity on DQ/DQS after a initial blip (see attached)
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    For the DIMM properties, are you using a preset? Which version of Quartus you are using?

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    I used Quartus 11.1, 13.0 and now 15.0. All same results.

    Yes I am using my own PRESET, stolen from a design that worked for Cyclone II 8 years back. I am thinking that could be a problem. Do you have a PRESET for 1GB/2GB unbuffered DDR2? Thanks, I really appreciate your answers.

    I get two warnings from ALTMEMPHY:

    warning: Cannot meet tRTP requirement of 7.5 ns. For a Memory interface clock frequency of 125.0 MHz, the minimum is 8.8 ns.

    warning: Cannot meet tRRD requirement of 7.5 ns. For a Memory interface clock frequency of 125.0 MHz, the minimum is 8.8 ns.

    I checked Micron data sheets they are both 7.5ns. I dont know why Cyclone IVE-8 can not meet the timings
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    I think some presets should already be there. If you've taken old presets it might be a problem of changed variables or other things. Either try to find existing preset or reset everything and fill in according to JEDEC standards.

    Also, I wonder... UniPHY is not supported for your device?
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Yes, UniPHY is not supported for Cyclone IV.

    Currently, I am trying a JEDEC standard DDR2 1GB DIMM. I will post the result
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Failed in simulation or hardware?

    I would offer two things then:

    1) If it fails in hardware -> check pinout.

    2) Raise a Service Request and send them your archived project (.qar)

    Also have a look at example projects of development kits. For example:

    http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=142&no=513

    or

    http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=39&no=260

    I think Arria II or Stratix III are old enough to have project examples with ALTMEMPHY.

    Are you using full rate bridge or half rate bridge?
  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    Failed in simulation or hardware? in hardware. simulation never finishes, it runs forever

    I would offer two things then:

    1) If it fails in hardware -> check pinout. i did. they all match with schematics

    2) Raise a Service Request and send them your archived project (.qar). yes i have it open: 11185961

    Are you using full rate bridge or half rate bridge? full rate