Forum Discussion

SStär's avatar
SStär
Icon for New Contributor rankNew Contributor
7 years ago

DCFIFO_MIXED_WIDTH simulation incorrect

According to the "FIFO Intel® FPGA IP User Guide", the DCFIFO has a special DCFIFO_MIXED_WIDTHS variant that allows different write and read port widths (ration as powers of 2). Figure 7 and 8 show ...
SStär's avatar
SStär
Icon for New Contributor rankNew Contributor
7 years ago

Dear @KennyT_Intel​ ,

sorry to bug you again, but what's your feedback on my finding?

An acceptable option for me would be to not go for "UNUSED" in case I don't know which device is targeted, but any device that is supported by default with the Quartus suite [that has dcfifo mixed width capabilities] (without the need to install any particular device support package).

Thanks and tschö, Steffen