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Altera_Forum
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11 years ago

Cyclone V WYSIWYG primtives are broken :-(

This a rather longish complaint. Maybe someone from Altera reads it and can me give some idea what to do. I am trying to implement my own DDR3 memory controller for a Cyclone V device (in pur...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Not from Altera's side.

I managed to completely reverse engineer how to interface with the Cyclone V WYSIWYG primitives and was thus able to interface with a DDR3 RAM.

This was rather painful and I definitely do not recommend it.

My current impression is, that if you want to do anything with an Altera FPGA, which requires low level knowledge you are completely on your own.

Altera will not support you at all; in fact it seems to be completely impossible to find someone inside Altera who is even mildly interested in any of these issues.