Forum Discussion
BrianM
Occasional Contributor
Occasional ContributorCyclone V: FPGA to SDRAM interface not working
Hello.
Part: Cyclone V 5CSXFC5D6F31C7, about 85% utilized.
I've written RTL in verilog for a simple MM interface from the FPGA to SDRAM 1 HPS interface. I created a test bench utilizing an MM DRA...
AnilErinch_A_Intel
Frequent Contributor
Frequent ContributorHi ,
Thanks for contacting Intel Support.
Please let us know the version of Quartus and Platform designer which you are using.
A similar error for NIOS can be seen below.
https://www.intel.com/content/www/us/en/support/programmable/articles/000086142.html
Thanks and Regards
Anil
BrianMOccasional Contributor
Occasional ContributorHi Anil,
I'm using Quartus 20.1.1 Build 720 on linux.
That patch only seems to apply to Windows, is there a linux version?
Thanks,
Brian
