Honored ContributorHi,
I have created a 16 bits x 2048 dual-clock FIFO with the MegaFunction plugin. I used the symbols created and created instances in a schematic file. However, when I compile the design, the compilation report says: Total Memory Bits Used : 0/119,808. Can anyone advise me why no instances are created? Thanks
Honored ContributorAre your FIFO connected to something in your design file? If they do not generate anything on at least one ouptut pin they can be automatically removed by Quartus.
Check also that they have not been generated with registers.Honored ContributorThanks. I had to add top-level output pins on the q-port, although the FIFO is internal.
Honored ContributorYou will find that you signals and devices will automagically disappear when you leave output and inputs unconnected; particularly outputs should be connected to something if you want to observe them. I really pulled my hair out while using signal tap because all the signals (during intermediate design testing) I wanted to look at would just disappear. Then I found that you didn't need to use the signaltap "wizard" and you could directly instantiate the signaltap ip as a component directly. It's a little more trouble, but well worth it if you want to keep some signals/registers/outputs.
