Forum Discussion

Visshnu's avatar
Visshnu
Icon for New Contributor rankNew Contributor
5 years ago
Solved

Cyclone 10GX Transceiver TX and RX independent

Hi, I am trying the cyclone 10gx low latency 10G base-R MAC example design(which comes with the duplex TX and RX mode)with the transceiver in TX and RX independent mode. When I try to merge the TX ...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

HI,


Did you change it in just your RTL design ?


I think it's better if you follow the KDB workaround guideline to modify the design in platform designer

  • The goal is to merge the address space for both Tx and Rx together


Thanks.


Regards,

dlim


  • Visshnu's avatar
    Visshnu
    Icon for New Contributor rankNew Contributor
    5 years ago

    Hi ,

    In the qsys file ,i have added the TX and RX ip files and an Avalon pipeline bridge ip. In the platform designer ,gave the same wire level expressions as in the KDB article .Now another issue occurs

    Error(12829): Failed to merge HSSI Avalon Memory-Mapped interface instances "dut_inst|CHANNEL[0].wrapper_inst|u0|xcvr_native_a10_0|g_xcvr_native_insts[0].twentynm_xcvr_native_inst|twentynm_xcvr_native_inst|inst_twentynm_xcvr_avmm|avmm_atom_insts[0].twentynm_hssi_avmm_if_inst" and "dut_inst|CHANNEL[0].wrapper_inst|u1|xcvr_native_a10_0|g_xcvr_native_insts[0].twentynm_xcvr_native_inst|twentynm_xcvr_native_inst|inst_twentynm_xcvr_avmm|avmm_atom_insts[0].twentynm_hssi_avmm_if_inst" into single Avalon Memory-Mapped Interface.
    Error(12829): Failed to merge HSSI Avalon Memory-Mapped interface instances "dut_inst|CHANNEL[1].wrapper_inst|u0|xcvr_native_a10_0|g_xcvr_native_insts[0].twentynm_xcvr_native_inst|twentynm_xcvr_native_inst|inst_twentynm_xcvr_avmm|avmm_atom_insts[0].twentynm_hssi_avmm_if_inst" and "dut_inst|CHANNEL[1].wrapper_inst|u1|xcvr_native_a10_0|g_xcvr_native_insts[0].twentynm_xcvr_native_inst|twentynm_xcvr_native_inst|inst_twentynm_xcvr_avmm|avmm_atom_insts[0].twentynm_hssi_avmm_if_inst" into single Avalon Memory-Mapped Interface.

    What is the workaround for this issue??