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Visshnu's avatar
Visshnu
Icon for New Contributor rankNew Contributor
5 years ago
Solved

Cyclone 10GX Transceiver TX and RX independent

Hi, I am trying the cyclone 10gx low latency 10G base-R MAC example design(which comes with the duplex TX and RX mode)with the transceiver in TX and RX independent mode. When I try to merge the TX ...
Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


May I know why you want to break the duplex channel into simplex channel ?


Other than using the XCVR_RECONFIG_GROUP qsf command that you shown earlier, you also need to take care of the overlap address mapping. You can refer to below KDB link for more detail.


You may need to modify the example design accordingly to remap back correct address space. This could be one the of the reason that explained failure in your side.


Thanks.


Regards,

dlim



Visshnu's avatar
Visshnu
Icon for New Contributor rankNew Contributor
5 years ago

hi,

thanks for the kdb article ,I am currently trying to understand the working of the Transceiver and wanted to know how it would work if set in simplex mode. In the altera_eth_base_r_wrapper.v file i have set the tx and rx pins as

.reconfig_clk (csr_clk),
.reconfig_reset (~csr_rst_n),
.reconfig_write (phy_csr_write),
.reconfig_read (phy_csr_read),
.reconfig_address (phy_csr_address),
.reconfig_writedata (phy_csr_writedata),

When i tried this the the same issue occurs .Is this the right way to do it or should i change it in the platform designer?