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Altera_Forum
Honored Contributor
19 years agoI have two tcl scipts that I use for the Full Version of Modelsim PE/SE.
One is for VHDL and the other is for Verilog. These files are attched in Simulation.zip file Its uses variables for pathnames so its easy to get working in your own environment. 1) open the tcl file you will see the following entry set path_to_quartus C:/Applications/Altera/61/quartus you then replace path_to_quartus with the pathname on your pc/linux machine to where quartus is installed 2) choose a location where you want the vhdl/verilog libaries to be installed eg C:\Applications\Altera\61\quartus\eda\sim_lib\vhdl C:\Applications\Altera\61\quartus\eda\sim_lib\verilog 3) run the vhdl script in C:\Applications\Altera\61\quartus\eda\sim_lib\vhdl Once the script is run then you will have a set of pre-compiled libraries for both rtl and gate level simulations. do the same for verilog 4) You will need to then create a modelsim.ini file in your project directory to point to these pre-compiled libraries