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Ideally what I want is a way to generate a tabular list of every pin on a given migration device "set" including the general purpose AND special function names for every pin on the device. NOT the user assigned function (which is what the pin file provides).
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It provides a bit more than that.
It says what each and every pin in the package is for your specific project and project settings (migration devices, configuration scheme, unused pins options, etc).
Not only for user I/Os, but for every pin -- unused pins, JTAG, VCCs, GNDs, VREFs, NCs, etc.
And that includes migration related stuff.
For example, the compilation checks that the pins you've assigned signals can be used as I/Os in all the devices.
Another example, if you have a pin which is NC in one device but VREF on another device, it will show up as VREF in the pin-out file if you select both devices.
Granted, it's not what you want when you're designing a PCB and trying to find out the simplest way to route to the FPGA.
For that, I'd try to merge the spreadsheets and use some filters to remove the non-interesting pins.
But as a correctness check that you haven't made an error and designed a PCB with a un-workable pin out, the pin-out report it's invaluable IMHO.
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