CPU and FPGA execution simultaneously

Hi ,

I amd using the OpenCL on De5.

<first question>

Could CPU and FPGA execution simultaneously ?

(When I enqueue a kernel to FPGA , and this moment CPU is idle.)

<second question>

If there are lots of branch condition in kernel code , how to optimize code ?

Is there any good example to reference ?

It seems that aoc compiler could not compile complex code and it could compile failed : (

<third question>

When the kernel code compile error , the error message always shows the error is happened in *.v file.

But I am not familiar with verilog / VHDL.

So is there any method to provide the simple error message ?

For example : syntax error is at line xxx ..

Thanks : DD