Thanks Tricky for your respond.
Yes. I already did the .mif file. The .mif file contained decimal number 128 and 0. I already got the VGA controller. Here is my coding. The problem is the FPGA seems not read in this part "IF (Q = "10000000")". It only display black color which is in when Q=0. I define when Q =128 (decimal) the RGB will set as white color and when Q = 0, the RGB will set as black color.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
ENTITY hw_image_generator IS
GENERIC(
pixels_y : INTEGER := 478; --row that first color will persist until
pixels_x : INTEGER := 478); --column that first color will persist until
PORT(
disp_ena : IN STD_LOGIC; --display enable ('1' = display time, '0' = blanking time)
row : IN INTEGER; --row pixel coordinate
column : IN INTEGER; --column pixel coordinate
red : OUT STD_LOGIC_VECTOR(7 DOWNTO 0) := (OTHERS => '0'); --red magnitude output to DAC
green : OUT STD_LOGIC_VECTOR(7 DOWNTO 0) := (OTHERS => '0'); --green magnitude output to DAC
blue : OUT STD_LOGIC_VECTOR(7 DOWNTO 0) := (OTHERS => '0'); --blue magnitude output to DAC
Q : in std_logic_vector (7 downto 0));
END hw_image_generator;
ARCHITECTURE behavior OF hw_image_generator IS
begin
PROCESS(disp_ena, row, column, Q)
BEGIN
IF(disp_ena = '1') THEN --display time
IF(row < pixels_y AND column < pixels_x) THEN
IF (Q = "10000000") THEN
red <= (OTHERS => '1');----white
green <= (OTHERS => '1') ;---white
blue <= (OTHERS => '1');---white
ELSE
red <= (OTHERS => '0');
green <= (OTHERS => '0') ;
blue <= (OTHERS => '0');
END IF;
ELSE
red <= (OTHERS => '0');
green <= (OTHERS => '1');
blue <= (OTHERS => '0');
END IF;
ELSE --blanking time
red <= (OTHERS => '0');
green <= (OTHERS => '1');
blue <= (OTHERS => '0');
END IF;
END PROCESS;
END behavior;