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Altera_Forum
Honored Contributor
8 years agoConstraining LEDs/Switches to VHDL onDE1-SoC
Hello, I am trying to write some basic VHDL that "slide" an on led down the 10 leds on the DE1-SoC board. I have loaded the .sof onto the board but nothing is lighting up. I think the VHDL is good be...
Altera_Forum
Honored Contributor
8 years agoA .sdc file is for defining timing requirements for a design to guide the Fitter during place and route. See this training and its follow-ons:
https://www.altera.com/support/training/course/odsw1115.html .qsf is the Quartus settings file. Any assignments you create in Pin Planner or the Assignment Editor are stored there.