Honored Contributor
Honored ContributorTQ does include the pad_io delays. I'm guessing the generated clock on the output does not see a path to the -source. There would be a warning about incorrect latency to this I/O.
I would suggest going back to the document I posted and use Case 3. Analyze it very carefully and make sure you understand it. Also look at pages 26-28 to see the report_timing analysis as well as the case where the clocks aren't there. One other thing about Th. Th is a spec that is opposite in sign of Tsu. Basically they're telling different things(Tsu says to get the data there early, Th says to get it late), yet they both have the same sign. set_output_delay says how much delay is outside the device. It's -max and -min values say the same thing, just a range of what that external delay is. In trying to convert Th in terms of delays, it gets inverted. Re-read my explanation on this before and see if it makes sense. Tsu converts directly, because a device's Tsu is basically saying its data path to the input register is Tsu ns longer than the clock path(that's why you have to have the data there that much earlier.) I'm getting busy with other stuff and out for a few days, so might not respond. Good luck.
