Constraining external ripple clocks correctly on external pin (pad_io)

Sure I can do this and you will see my timing is not closed at the moment.

It is great you are trying to help me, but my deisng is more complex.

I have not been able to close timing because I do not understand TQ properly and because my design is more complex. it is hard to explain but includes DDR inputs registers running on the system clock while the output runs on the double clock etc.

I might change the design but first I must understand TQ ways of doing thinks.

I pretty sure I can close timing I have done stuff like this before, without TQ.

But first I must understand how TQ can do an analyze without including the pad_io in my external clock driving the external device?

My phases are odd because the total path when reading from the external device is longer than one period etc, they may need to change, don't worry about that for now.

It would be great if you can make me understand the way TQ does it, because in my eyes it looks like it can not do it correctly.