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Altera_Forum
Honored Contributor
Honored Contributorconnecting a single output to a bus
Hello everyone, I am a beginner at FPGA and I'm pretty much stuck with what I think is a basic problem. I can't extract a single signal from a bus. I have data[7..0] and graphically connected an outp...
Altera_ForumHonored Contributor
Honored ContributorYou could also try with the Verilog coding or VHDL coding which I believe it should be simpler to extracting single data bit from a bus.
