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Altera_Forum
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15 years ago

connecting a single output to a bus

Hello everyone, I am a beginner at FPGA and I'm pretty much stuck with what I think is a basic problem. I can't extract a single signal from a bus. I have data[7..0] and graphically connected an outp...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

If this is the graphical editor, you need to do named association to get individual bits out of a bus. You cannot simply connect them.

Just leave them physically disconnected, but name the single bit line as Data[0], data[1] etc. It will connect them for you when compiling (even thhough they stay disconnected in the diagram).