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Hi folks, while I am familiar with set_input/output_delay -max where it specifies the maximum time taken for the data to travel to and from FPGA, I am still very confused with -min value. I noticed in most cases, we specify a negative value for -min but what does that actually mean? It will still take time to travel, just that the value should be smaller than -max but why the negative value?
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If the data arrives before the specified clock edge, then the delay is negative. The maximum or minimum delays specified could be positive or negative. The only restriction is that max > min.
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