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Altera_Forum's avatar
Altera_Forum
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10 years ago

Confirm signal is connected to IOE register

I'm having external memory interface timing errors at cold temperatures and needed to confirm that the interface signals are being assigned to IOE registers in the Stratix II device. How is this most easily done? I've checked the fitter report and it indicates 'Output Register' is 'yes', but I wasn't sure if this was a register in the core or the IOE register. I was having difficulty verifying this in the Technology Map Viewer and was wondering if there's an easier way.

I'm constraining the signals with line such as the following in qsf file:

set_instance_assignment -name FAST_OUTPUT_REGISTER ON -to PING_Wr_En_n

Thanks, GMM

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    I will look at chip planner (post fitting) and io assignment warnings

  • Altera_Forum's avatar
    Altera_Forum
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    10 years ago

    It doesn't look these tools tell specifically if register is inside io or fabric. So I suppose you better check "ignored io assignments" and see the difference of numbers of "dedicated logic registers" and "total registers" in the compilation report. That difference is due to io registers being used.