Configuration I/O voltage

I am attempting to locate 2.5V LVDS differential signals into Bank 3A of a Cyclone V device - this being the Bank that also contains the Configuration pins.

In Quartus II - Device Assignments / Device and Pin options.. / Configuration

I am able to specify "Active Serialx4" scheme and select configuration device "EPCQ128".

Now, there are two more Options :

1) Configuration device I/O voltage - with selection of "Auto" or 3.3V

.... I'd like to know what the "Auto" setting does here - do I NEED to set it to 3.3V or does Auto do this for me (as its an Altera Device that is selected).

But more importantly :

2) (Tick box) - " Force VCCIO to be compatible with configuration I/O voltage "

for which the description comes up :

"Forces the VCCIO voltage of the configuration pins to be the same as the configuration device I/O voltage"

- now what I'm trying to understand is what this box does, and why I would choose NOT TO tick it.....

- If I leave it unticked, my design passes the I/O Assignment analysis phase. (= Job done ??)

But if I tick it, I get messages :

! 169213 Configuration voltage level of 3.3V is enforced on the I/O Bank 3A. The VCCIO of the I/O Bank is set to 3.3V

followed by errors for the LVDS pins :

! 169235 I/O bank 3A cannot select VCCIO of 2.5V which is required for pin ("pin_name") with I/O standard LVDS

This behaviour implies that leaving the tick box unticked allows me to have the configuration pins within Bank 3A operating at 3.3V I/O and the LVDS pins within Bank 3A operating at 2.5V I/O......(which is what I would like to achieve)

- Is this a correct assumption ?