Honored Contributor
Honored ContributorThis is my third attempt to post.. My previous posts don't seem to be taking, so if you get multiple answers, sorry.
The most likely cause is the state of unused pins in your "Simple test program" in the earlier versions of quartus they default state of un-used pins, was tristated inputs with a pull-up, but at one point, they switch this to "outputs driving GND". Now if your board has a means for the FPGA to physically reset or power cycle the board base on the state of an FPGA pin, this can cause problems. This is changed under Assignments->Device->Device and Pin Assignments->Unused pins I Would recommend, either input tristated with weak pull-up or input tristated with bus-hold circuit. Pete
