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SKinz's avatar
SKinz
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7 years ago

Clock, PLL, driver placement

I have a design that places plls and clock drivers with a little bit interface planning in Quartus 18.0.1. But, Quartus 18.1 fails to find a placement solution on the same design. Using the interface...
SKinz's avatar
SKinz
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7 years ago

BTW, this is an Arria 10 design in the biggest part and I'm using Quartus Pro in both cases.