New Contributor
New ContributorWas able to see it with this, "report_timing -from [all_inputs] -setup -npaths 100 -pairs_only -extra_info none -detail full_path -panel_name {all input}"
How come you have the incoming clock and data being generated from the clock sent out? I get that it is the topology, but basically you're asking for that delay to be completely removed by CCPP, so if you just describe the incoming clock and data with a create_clock, then it would work.
My guess is what you're asking isn't feasible. CCPP removal doesn't just look for commonalities between Data Arrival and Required, but I believe is tied into the timing models. (Many years ago, when sending clock and data out for a source-synchronous transmit, we didn't fully remove all the CCPP between those paths, and it took a while for the timing analyzer to implement because it was pretty low-level. So I really doubt it will just work for your case.
If I were to take a guess, the reason you want this is to synchronously timing the clock that is sent off chip and wrapped back around with the original clock that sends it?
