--- Quote Start ---
hello @kaz, yes design doesn't work and i see no timing violations. hence i was trying to add a constraint on the enable to make sure enable reaches the flop on time.
So how do i write a constraint on the enable of a flop in SDC. thanks for your help.
--- Quote End ---
To me, the fact that you passed timing excludes clock enable fanout.
But if you want peace of mind then you can either replicate your enable by hand or add maxfan constraint
To replicate you just produce as many clockenables as you wish i.e. at the point you generate clockenable then similarly generate clockenable2,clockenable3 etc on same logic without latency from clockenable itself.
maxfan attribute can be added to an signal at declaration:
ATTRIBUTE maxfan of clockenable : SIGNAL is 100;
Honored Contributor
