Cell usage report

The Xilinx report does not tell you number of Adders, Ands Nands etc. It tells you the number of LUTs used with 2/3/4/5 inputs. A single LUT may contain several gates and will contain the logic for adders and counters.

Memories and Multipliers are discrete elements, and so will be counted separately.

FPGAs do not have gates, they only have LUTs, registers memories and multipliers. So you cannot get the information broken down any differently.

Also remember that the architecture of Xilinx and Altera parts are not the same, so comparing like for like is not possible.

The fit report gives you the information you need.